A basic Makefile question

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  1. #1

    Default A basic Makefile question

    Hi,

    I have read through the GNU Make website on the internet, but I am
    still unsure of how to create the Makefile for multiple .c files(150
    ..c files to be exact)

    The following is my Makefile for a 3 .c files and one .h file into one
    single .exe file:
    CFLAGS=

    TGT=tt

    OBJ=file1.o file2.o file3.o

    $(TGT): $(OBJ)
    cc $(CFLAGS) $(OBJ) -o $(TGT);

    file1.o: file1.c testheader.h
    cc -c file1.c;

    file2.o: file2.c
    cc -c file2.c;

    file3.o: file3.c testheader.h
    cc -c file3.c;

    clean:
    rm -f *.o;

    The above Makefile is for 3 .c files only. If I want to compile a
    total of 150 different .c files, what should I do? Do I really have to
    type out the following part for every single .c file?

    file1.o: file1.c testheader.h
    cc -c file1.c;

    I would greatly appreciate it if anyone can tell me a shorter and more
    efficient method of compiling and linking all the 150 .c files into
    one single .exe file.
    Thanks alot in advance for your kind help.

    Regards,
    Suzanne
    Suzanne Baker Guest

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  3. #2

    Default Re: A basic Makefile question

    On 1 Jul 2003 01:16:02 -0700, [email]suz__1@hotmail.com[/email] (Suzanne Baker)
    wrote:
    >I would greatly appreciate it if anyone can tell me a shorter and more
    >efficient method of compiling and linking all the 150 .c files into
    >one single .exe file.
    Hi Suzanne,

    The following is a makefile that you might find useful. It has
    overhead in that it computes the dependencies at build time using a
    few smart tricks. All you have to do is replace the name of the
    executable, flags, and libs on the first 3 lines. Place the makefile
    in the same directory as your source code and you should be in
    business.

    I got this makefile from a friend a while back so I'm not sure where
    it is from. It was originally for .cpp files but I have replaced
    g++/.cpp with gcc/.c in the makefile below (hope it still works!).

    Hope it helps,
    Eric.

    ---
    EXECUTABLE = program
    CPPFLAGS = -ggdb3 -Wall
    LIBS = -lpthread
    #################################################
    CC = gcc
    SRCS := $(wildcard *.c)
    OBJS := $(patsubst %.c,%.o,$(SRCS))
    DEPS := $(patsubst %.c,%.d,$(SRCS))
    #################################################
    all: $(EXECUTABLE)

    $(EXECUTABLE): $(DEPS) $(OBJS)
    $(CC) -o $(EXECUTABLE) $(OBJS) $(LIBS)

    %.d: %.cpp
    $(CC) -MM $(CPPFLAGS) $< > $@
    $(CC) -MM $(CPPFLAGS) $< | sed s/\\.o/.d/ >> $@

    %.d: %.h
    $(CC) -MM $(CPPFLAGS) $< > $@
    $(CC) -MM $(CPPFLAGS) $< | sed s/\\.o/.d/ >> $@
    clean:
    -rm $(OBJS) $(EXECUTABLE) $(DEPS) *~

    explain:
    @echo "--------Some Info--------"
    @echo "Executable name: $(EXECUTABLE)"
    @echo "Source files: $(SRCS)"
    @echo "Object files: $(OBJS)"
    @echo "Dependency files: $(DEPS)"

    depends: $(DEPS)
    @echo "Dependencies updated"

    -include $(DEPS)

    run: all
    ./$(EXECUTABLE)

    debug: all
    gdb $(EXECUTABLE)

    clean-emacs:
    rm *~
    ---

    Eric Guest

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