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Makefile question - UNIX Programming

Hello, I would like to ask the following Makefile question... Suppose I have the following in my Makefile: foo1: bar foobar foo2: bar foobar where the actions are the same and so are the dependency lines. Here execution of foobar requires bar to be built first, but when foobar is executed two files, not one, are produced. The two files are named foo1 and foo2. So, I don't want to have two separate rules, because I want foobar to be executed only ONCE. That is, I want something like this: foo1, foo2: bar foobar Where executing either "make foo1" or ...

  1. #1

    Default Makefile question


    Hello,

    I would like to ask the following Makefile question...
    Suppose I have the following in my Makefile:

    foo1: bar
    foobar

    foo2: bar
    foobar

    where the actions are the same and so are the dependency lines.

    Here execution of foobar requires bar to be built first, but when
    foobar is executed two files, not one, are produced. The two files
    are named foo1 and foo2. So, I don't want to have two separate
    rules, because I want foobar to be executed only ONCE. That is,
    I want something like this:

    foo1, foo2: bar
    foobar

    Where executing either "make foo1" or "make foo2" produces both
    foo1 and foo2, but make all executes foobar only once. That is,
    once foo1 is built, and foo2 needs to be built, then foobar is
    not executed again.

    Is there an easy workaround for this problem using Make?
    And is there a portable solution?

    Thanks,

    Neil

    Neil Guest

  2. #2

    Default Re: Makefile question

    Neil Zanella <mun.ca> writes:
     

    Try:

    foo1 foo2: bar
     

    Yes, that is a portable solution.

    Cheers,
    --
    In order to understand recursion you must first understand recursion.
    Paul Guest

  3. #3

    Default Re: Makefile question


    Paul> foo1 foo2: bar

    Paul> Yes, that is a portable solution.

    I'd like to believe that, but I'm not so sure :-(

    http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=218367

    Please consider this a request for comment or help regarding that issue.

    --
    "Rap music is our punishment for neglecting music education."
    An anonymous teacher

    Ian Guest

  4. #4

    Default Re: Makefile question

    Thanks!

    Neil

    Paul Pluzhnikov <net> wrote in message 
    >
    > Yes, that is a portable solution.[/ref]
    Neil Guest

  5. #5

    Default makefile question

    Hi,


    Suppose i have a makefile as below :

    f1.o : f1.c
    cc -c f1.o

    f2.0 : f2.c
    cc -c f2.c

    all : f1.o f2.o
    cc f1.o f2.o -o binary


    Now when i give the command "make" what happens.If i give "make all"
    then it calls all though.

    regards
    pandapower Guest

  6. #6

    Default Re: makefile question

    net (pandapower) writes:
     

    I suppose you ask why the `all' target is not built if you simply say

    make #1

    from the command line, but (naturally) is built when you explicitly
    request the `all' target as in

    make all

    ?

    The reason has to do with how make(1) actully works. Without an
    explicit target (as in #1 above), the /first/ target of the
    description file (in this case `f1.o') is built. A target named `all'
    in itself has no special meaning to make(1), only to humans reading
    the description file.

    This (perhaps perplexing at first sight) rule is why it is custumary
    to make the `all' (or a similarly all-encompassing) target the first
    target encountered in the description file.

    Note, incidentally, that there is a (probable) typo in the makefile,
    as the second target supposedly builds `f2.0' (not `f2.o'). Unless
    the file is very long and intricate (or governed by an NDA or
    otherwise restricted), it would probably have been easier just to
    paste the real makefile into the post rather than typing it anew.

    Others may well provide additional detail and correct my mistakes, so
    please do follow the thread for some time to see if any new material
    is posted.


    Regards,
    --
    Bård Skaflestad <ntnu.no>
    Department of mathematical sciences, NTNU
    Bård Guest

  7. #7

    Default Makefile question

    I'm trying to get a makefile setup using the version of make that comes with
    Solaris 9. My situation is that I have a large number of files, about 300
    which all end in the extension of ".fmb". When the files are properly
    compiled they end up with an extension of ".fmx". There is a dependency on
    files with an extension of "*.plx". The plx files are created from "*.pll"
    files. The pll have no dependencies, they are the starting point.

    I have another group of files which end in the extension of mmb. They are
    much like the fmb files. The same rules apply.



    The dependency of the fmb and mmb files is pretty simple. They all work the
    same way.



    To compile and individual fmb file one would enter "ifgenm module=zaq.fmb
    module_type=form log=zaq.log"

    To compile and individual mmb file one would enter "ifgenm module=cde.mmb
    module_type=menu log=cde.log"



    All of the pll and fmx file's prefixes are the same as the plx and fmx
    files. I think I am saying this correctly, and example would be: zaq.fmb
    compiles to zaq.fmx and xsw.pll compiles to xsw.plx



    I can have new fmx and mmb files to compile pretty much without warning. The
    developers copy the files out to a location on the system and their ready.



    To deal with this situation I want to have a makefile that groups the fmb
    files together so that a developer can simply enter something like "make
    new_fmb" which would look find the fmb files newer than the fmx and compile
    that list. The same of the mmb files: something like "make new_mmb".



    I am hoping there is a way to just group all the fmb files so that I do not
    have to list all 300 fmb files in the makefile. I have tried some lines
    like:



    ..fmb

    ifgenm module=$<

    plus a bunch of other ways. My question is: Can this be done, grouping files
    by extension and use the same line? I really want to avoid something like



    1.fmb

    ifgenm module=$<



    2.fmb

    ifgenm module=$<

    and so on. If so what does the makefile look at, could I have an example

    Thanks for your time.


    Oxmard Guest

  8. #8

    Default Re: Makefile question



    Oxmard wrote: 
    <snipped> 

    You can learn a lot about makefiles if you examine
    /usr/share/lib/make/make.rules. This file contains all of the
    "implicit" make rules that are loaded every time you run make. There
    are many rules described there for converting files of one type to
    another such as the rule ".c.o:".

    All you need to do is define more "SUFFIXES" and then your own implicit
    make rules.

    --

    Fletcher Glenn

    Fletcher Guest

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